Wafer Inspection: A Critical Step in Ensuring Chip Quality

Wafer inspection is for each grain on the chip for needle detection, in the detection head with a fine hair probe (probe) made of gold wire,wafer testing and the contact point (pad) contact, detection of its electrical characteristics, through the mark will be marked out, and then in accordance with the size of the unit of the grain chip will be cut into individual grains, through the mark will be eliminated from further manufacturing, in order to reduce the incomparable manufacturing costs.

After wafer fabrication is complete, wafer inspection is a critical step. This inspection step is a form of reporting for the wafer manufacturing process. Throughout the testing process, each chip is tested for charging workability and power circuit functionality. Wafer inspection is also chip classification or wafer classification.

During the test process, the wafer is held on a vacuum pump suction cup and a probe electrostatic meter is pointed at the hair-thin wafer while touching each pad of the chip. The electrostatic meter detects the power circuits under the power driver and records the results.wafer probe The total number, sequence and type of tests are controlled by a computer system. The tester is automated so that no operator assistance is required when the probe static meter is aligned with the first wafer (either by manual pointing or using an automated visual recognition system).

The test is designed for the following three general objectives. First, it will be able to distinguish whether a wafer is qualified or not, and send qualified wafers to the packaging plant. Secondly, the main parameters of the components are professionally evaluated. Technical engineers must test the distribution of the main parameters in order to maintain the quality level of the process. Third, the statistics of qualified and defective chips will provide all-round performance feedback to the wafer fabricators. The location of qualified chips and defective products on the wafer is recorded on the computer in the form of a wafer map. In the past, the old-fashioned technology draws a dot on the defective chip.

Wafer inspection is one of the main chip technology product quality qualification rate statistical research and analysis teaching methodology issues. As the total area of chips in China expands and the density continues to increase driving the cost of wafer inspection to be greater and greater.probe holder As a result, chips must be inspected for longer periods of time with different time management as well as students with more sophisticated and complex power supplies, mechatronics and computer information systems to perform the inspection work and supervise the results of the target inspection experiments. The visual inspection control system aspect is also one that has become more sophisticated and expensive as our chip sizes have expanded. Chip designers are being asked to introduce test patterns into the memory arrays. Design professionals are exploring and learning how to simplify and rationalize the test steps, such as applying simplified test codes after the core reference chip is evaluated to meet the main number of standards, in addition to detecting the chips on the wafer line by line, or at the same time they are dealing with the detection of multiple chips.